On November 9, 2026, AMD announced that 5th Gen EPYC processors would provide the host infrastructure for Google Cloud TPU 8tx. The CPUs coordinate workloads and prepare data for Google’s TPU accelerators, while AMD describes a confidential-computing design whose security features must be enabled by the server maker or cloud provider. AMD’s announcement outlines both roles and the feature qualification.
When assessing the design, distinguish the host CPU’s coordination work from the TPU accelerators’ AI processing—and treat security features as dependent on the provider’s configuration.
EPYC coordinates the TPU accelerators
AMD assigns 5th Gen EPYC the host role: orchestrating workloads, preparing data and communicating with the TPU accelerators. The processors support the system around the accelerators; they do not replace the TPUs.
How AMD describes the security design
AMD says the design combines EPYC Secure Encrypted Virtualization (SEV) capabilities with Google’s TPU environment. In AMD’s description, the system checks an accelerator’s identity and security configuration before granting it direct access to protected memory. AMD also says prompts, model weights and intermediate data can remain encrypted in CPU memory and while moving between the host and accelerators, with hardware isolation during accelerator execution.
AMD’s Infinity Guard features vary by EPYC generation and series, and server OEMs or cloud providers must enable them. As a result, the protections in a deployment depend on the features enabled by its provider or server maker.
Workloads named by AMD
AMD identifies inference, fine-tuning and reinforcement learning as workloads for the collaboration. The announcement also refers to reasoning and agentic AI applications; these are workload examples, not reported performance results.
