T-Head RISC-V C950: reported results and Linux support

At the RISC-V China Summit in Shenzhen on Oct. 19, 2026, Alibaba DAMO Academy chief scientist Meng Jianyi presented XuanTie C950 results that Laoyaoba reported on Oct. 25: 78% XT-LINK linearity at 128 cores and AI inference rates of 43 and 38 tokens per second for two models. XuanTie describes C950 as 64-bit RISC-V processor IP and provides an SDK and an eight-core QEMU boot example.

What XuanTie says C950 is

XuanTie describes C950 as a 64-bit processor design based on the RVA23 RISC-V profile. Its microarchitecture is superscalar, meaning it can process multiple instructions in parallel, and executes instructions out of order to keep the processor's units busy. C950 also supports XuanTie’s AME matrix extension and an interface to its TPE tensor engine.

Those extensions address matrix and tensor operations used in AI computing. The processor IP description identifies a design intended for integration into larger systems, rather than a retail CPU configuration.

What the reported performance figures measure

Laoyaoba’s account of Meng’s presentation reported 78% XT-LINK multicore linearity at 128 cores and total performance equal to 99.8 times the single-core reference. Linearity describes how closely performance scales as cores are added.

For four agentic-workload tests, the account reported average performance of about 1.11 times that of the compared mainstream architectures, and an aggregate AI-performance improvement above 10%. It also gave inference rates of 43 tokens per second for Qwen3.8-Flash-Next and 38 tokens per second for DeepSeek V4-Flash. An agentic workload is one in which an AI system handles a task through multiple steps.

Lauterbach’s Sept. 15, 2026, announcement separately reported C950 clock speeds up to 3.2 GHz, up to eight cores per cluster, more than 70 single-core SPECint2006 points at full speed, and more than 22 SPECint2006 points per GHz. SPECint2006 measures integer-computing performance; the per-GHz figure expresses the score relative to clock speed.

The documented Linux and QEMU development path

XuanTie’s Linux SDK lists these component versions:

QEMU is an emulator, letting developers run a modeled system in software. XuanTie’s QEMU guide shows an eight-core C950 model, xt-c9501fdvt, booting Linux 6.6. The SDK also lists FPGA platforms, which allow a design to be prototyped on programmable hardware.

Canonical said it demonstrated Ubuntu server-grade virtualization with IOMMU on C950 running on an FPGA. That is a separate example of software running on a hardware prototype.

TRACE32 adds debugging and trace support

Lauterbach announced that its TRACE32 tools support simultaneous C950 multicore debugging and processor-trace capture. The support includes non-intrusive tracing and high-speed off-chip trace, tools developers can use to inspect how a system behaves while they debug it.

The automotive designs are separate from C950

Laoyaoba reported that Meng’s presentation described the XuanTie E908A as meeting ASIL-B and ASIL-D, with a reported SPFM above 90%. Those claims concern E908A, a separate automotive processor.

The same account said XuanTie planned to introduce C950A at the end of 2027, with a performance target five times that of current RISC-V automotive products. C950A is a separate automotive roadmap design, not a C950 specification.