Executives from TSMC, Intel and Samsung Electronics discussed AI-chip development challenges at the opening of an Applied Materials event on Oct. 12, 2026, according to Monica Chen’s report for DIGITIMES, published Oct. 14. The topics named were advanced semiconductor processes, 3D integration and research models.
What the discussion covered
The reported themes point to the technical breadth of AI-chip development, from advanced processes to 3D integration. They do not identify a specific company’s position or proposal; the account describes a discussion among executives from the three companies.
Why manufacturing data can be difficult to integrate
Manufacturing analysis may draw on equipment readings, inline metrology (measurements taken during production), defect-inspection classifications and electrical-test results. In an Aug. 22, 2018 interview, David Fried, then CTO of Coventor, described how these sources can differ in format, sampling method and units. He said predictive analysis depends on organizing them into a usable structure. Semiconductor Engineering’s interview with Fried explains the data-integration challenge.
That is one kind of integration: making unlike factory data usable together. It is distinct from coordinating the physical components and production steps involved in chiplet manufacturing.
What chiplet production has to coordinate
In its Oct. 14, 2025 article, PDF Solutions described coordinating substrates, base dies, third-party components, packaging technologies, OSAT configurations and test systems across suppliers. OSAT stands for outsourced semiconductor assembly and test. Here, the coordination spans physical parts, packaging choices and testing across the production chain. PDF Solutions’ article provides this separate industry example.
