SiPearl and Egis Group signed strategic cooperation and investment agreements on October 22, 2026. Their collaboration includes Mobius100 (M100), a CPU platform that Egis Group subsidiary Alcor Micro is co-developing with SiPearl. SiPearl plans to use M100’s architecture as the basis for its Rhea2 CPU.
What SiPearl and Egis Group are developing
Egis Group and SiPearl signed the agreements; Alcor Micro and SiPearl are developing M100. SiPearl describes Rhea2 as its second-generation CPU for high-performance computing (HPC), AI, cloud service providers and data centers.
M100 is a CPU chiplet platform based on Arm Neoverse V3 CSS V3 technology. SiPearl says the platform’s architecture will underpin Rhea2, while the announced specifications below apply to M100.
M100’s announced features
SiPearl describes M100 as a dual-die package with 140 cores, including 12 redundant cores. The platform is specified for DDR5-12800 MRDIMM memory and has eight UCIe 2.0-S chiplet interfaces. Its other named connections include PCIe Gen6 and CXL-based expansion, with coherent links between CPUs and between CPUs and accelerators.
For computing and security, SiPearl lists Arm SVE2 vector processing, a hardware root of trust based on Caliptra 2.0, Arm Confidential Compute Architecture and RME capabilities. These details describe M100, the platform being developed as the architectural basis for Rhea2.
Rhea2’s planned role and schedule
SiPearl says Rhea2 is intended to be part of the Alice Recoque supercomputer in France. The company’s roadmap targets M100 engineering samples in 2027 and volume production in the second half of 2028. SiPearl says those targets depend on development, validation and customer requirements, and plans to launch Rhea2 shortly after M100.
