Infineon announced AURIX RC1 on November 4, 2026, as its first automotive microcontroller (MCU) platform based on RISC-V, an open instruction-set architecture. The platform is intended for software-defined vehicles and other software-defined systems. Infineon targets samples for the first half of 2027. The company’s announcement describes a family of processors, not a single fixed configuration.
What Infineon plans for AURIX RC1
Infineon positions AURIX RC1 as a shared computing foundation for vehicle systems ranging from zone, body and chassis control to battery management, powertrain, driver-assistance safety management and the cockpit. The company also names other software-defined systems and Physical AI as intended applications.
The architecture and the AI hardware play different roles. RISC-V defines the instruction set; Infineon separately describes an advanced parallel processing unit for edge AI. That distinction matters when evaluating the announcement: the AI processing unit is a named platform component, not a capability provided by the instruction set itself. NeoTeo has also explained how RISC-V cores can be combined with AI accelerators.
For early platform planning, treat the core and memory figures as family-wide ceilings, then wait for a specific device configuration before sizing a design.
The family’s announced capabilities
Infineon says application-dependent AURIX RC1 configurations will have up to 12 32-bit processing cores and up to 40 MB of embedded memory. Those are separate family-level maximums, not a specification for every device. The company has not tied them to individual models in its announcement.
A higher-end lineup with additional 64-bit microprocessor capabilities is planned. For networking, Infineon lists CAN-XL, 10BASE-T1S and multi-Gigabit Ethernet. BRIGHTLANE switching and hardware-accelerated data routing apply to selected devices.
Infineon says the platform is designed for applications up to ASIL D, a level in automotive functional-safety engineering. It also describes cybersecurity mechanisms addressing ISO/SAE 21434 and the Cyber Resilience Act. These are manufacturer design claims.
What the virtual prototype offers developers
Before physical samples, a virtual prototype can give development teams a software environment to work with. Automotive World reported that the DRIVECORE RISC-V Virtual Prototype bundle includes Infineon AURIX RISC-V iLLDs, Synopsys Virtualizer Development Kit, HighTec’s automotive-grade C/C++ compiler and Lauterbach TRACE32 debug and trace tools. The report says the cloud-enabled environment supports pre-silicon software development and toolchain-readiness validation, and that the three DRIVECORE bundles it covered include a three-month free evaluation license.
RISC-V International reported in 2025 that a Synopsys VDK-based prototype models a RISC-V multicore cluster, interrupt controller, interprocessor communication and automotive peripherals. Its account describes software drivers and a template project as part of an SDK for pre-silicon work, and says PLS UDE 2025 is used for trace-based analysis and debugging. The virtual model gives developers a platform to work against; it does not provide measurements of a physical AURIX RC1 device.
The announced schedule
Infineon scheduled a presentation of the AURIX RC1 family concept at Electronica in Munich for November 10–13, 2026. The company’s separate target for samples is the first half of 2027.
