Micron reportedly plans to move its 3D NAND roadmap directly from G9 to G11, abandoning its planned G10 generation. Blocks & Files reported the change on October 22, attributing it to remarks by Scott DeBoer, Micron’s president and chief technology and products officer, at a company technology webinar on October 21.
What Micron is targeting with G11
Micron’s reported G11 targets compare with G9, which Blocks & Files described as a shipping 276-layer NAND generation. The Micron 2650 client SSD, launched in July 2024, was identified as the first product to use G9. DeBoer said G11 would use wafer-on-wafer bonding and exceed 400 layers.
| Metric | G9 | Planned G11 target |
| Layer count | 276 layers | More than 400 layers |
| Bit density | Baseline | 2× G9 |
| I/O speed | Baseline | Up to 1.5× G9 |
| Energy per transferred bit | Baseline | 25% less than G9 |
Bit density measures how much data fits in a given area of NAND. I/O means input/output, or the movement of data into and out of storage. Micron’s reported targets address different properties: density, transfer speed and the energy used to transfer each bit.
When Micron plans to ramp G11
Micron’s reported roadmap puts the G11 volume ramp in the second half of 2027. That is a planned production milestone, not a report that volume production has begun.
Two proposed NAND designs for AI systems
Micron described two future AI-class NAND directions. One uses SLC, or single-level cell, NAND in small blocks to target high IOPS. IOPS means input/output operations per second. The reported target for a future high-IOPS SSD is 25 million to 100 million IOPS.
The second concept targets high bandwidth with stacked NAND connected to a base die through TSVs, or through-silicon vias, and positioned close to compute. DeBoer said this approach would require customer partnership and a viable cost point.
DeBoer named AI PCs and workstations, automotive systems, robotics, mobile devices and wearables as possible markets for future AI-class NAND.
