On Nov. 6, 2026, The Information reported that TSMC had recently begun drafting plans to produce vertically stacked 3D DRAM at Nvidia’s request, citing two people familiar with the plans. The report described two possible facility routes: building a dedicated site or acquiring and retooling an existing one.
The reported proposal would extend TSMC’s role from making logic chips for customers into memory manufacturing.
Why the reported plans matter
TSMC is an established logic-chip foundry. If pursued, the reported 3D DRAM effort would take the company into a memory market served by Samsung Electronics, SK hynix and Micron. NeoTeo has previously covered how TSMC and ASML face different AI-chip bottlenecks.
Neither facility route was described as selected. Investing.com reported that TSMC vice president Hsu Kuo-chin was leading the exploration and overseeing advanced packaging.
What 3D DRAM involves
Three-dimensional DRAM stacks memory structures vertically. Lam Research’s general technical animation illustrates vertical pillars and stacked layers, and discusses high-aspect-ratio etching and atomic layer deposition as techniques for forming precise vertical structures.
